What the submount must do in GaN RF modules
In a GaN RF power module, the submount sits between the GaN die and the package floor or lead frame. It spreads heat from the channel region, provides electrical isolation from the ground plane (for ceramic routes), and offers metallized pads for die attach and wire or ribbon bonding. Failure modes include hot spots under the gate finger region, delamination after temperature cycling, and RF performance drift from elevated channel temperature.
GaN on SiC or GaN on Si devices have a device-level CTE around 5.6 ppm/°C. Submount CTE in the 3.7–4.6 ppm/°C range (SiC, ALN) is workable for small die; large die or aggressive cycling may require stress modeling and underfill choices.
SiC vs ALN vs Cu-Mo-Cu comparison
| Criterion | Single-crystal SiC | Polycrystalline ALN | Cu-Mo-Cu laminate |
|---|---|---|---|
| Thermal conductivity | 350–400 W/m·K | 170–210 W/m·K | 170–220 W/m·K (effective through-plane) |
| CTE | 3.7–4.3 ppm/°C | 4.3–4.6 ppm/°C | 5–7 ppm/°C (grade-dependent) |
| Electrical | Semi-insulating | Insulating | Conductive — ground path design differs |
| Die attach | AuSn, solder, epoxy on Ti/Pt/Au | Mature AuSn and solder flows | Often direct solder to Cu face |
| Best for GaN RF | >10 W CW, high current density, pulsed radar | Low–mid power MMIC, cost-sensitive modules | Highest current, some wideband PA modules |
| Hermetic ceramic package | Excellent fit | Excellent fit | Requires hybrid assembly |
| Relative cost | Higher | Lower — mature supply | Highest — laminate + machining |
| US lead time (typical) | 2–4 wk (FerraLink standard) | 4–8 wk | 8–12+ wk custom laminate |
When to choose SiC
Select single-crystal SiC when CW power exceeds roughly 10 W, channel temperature must stay bounded under burst traffic, or thermal density approaches limits where ALN spreading resistance dominates the stack. Radar and EW GaN PAs, high-power 5G massive MIMO linecards, and wideband jammer modules commonly land here.
FerraLink SiC submounts ship with Ti/Pt/Au metallization, standard sizes through 3.5 × 4.55 mm, and material documentation for qualification.
When to choose ALN
ALN is the right ceramic when power is moderate, the module uses established AuSn die attach into a hermetic cavity, and BOM cost matters more than the last 20°C of channel margin. Many 1–5 W GaN MMICs in ceramic packages run successfully on ALN with proper heat sink and flange design.
See ALN submount specifications including AuSn-predeposited options for fluxless attach.
When SiC margin is exhausted: diamond (pre-release)
If channel temperature still exceeds targets after SiC pad and thickness optimization, CVD diamond heat spreaders (~1,500–2,200 W/m·K in-plane) are the next tier — scoped through FerraLink's pre-release program, not the catalog sample box. See CVD diamond submount guide.
When to choose Cu-Mo-Cu
Cu-Mo-Cu (and related Cu-W or Mo-Cu) laminates trade electrical conductivity and current spreading for a different assembly paradigm: the submount is often part of the ground thermal path, not an isolated ceramic island. They appear in some high-current wideband PAs where through-plane conductivity and CTE tailoring of the laminate stack matter more than dielectric isolation.
- Pros: excellent current spreading, tunable CTE via Mo ratio, established in some defense RF houses.
- Cons: higher cost, longer lead times, moisture-sensitive assembly if not hermetically sealed, not interchangeable with ceramic submount process lines.
Decision flowchart (simplified)
1. Is the package hermetic ceramic with isolated die pad? → If yes, consider SiC or ALN (not bare Cu-Mo-Cu unless hybrid).
2. Is CW power >10 W or pulsed peak density high? → Prefer SiC.
3. Is the module cost-sensitive and <5 W CW? → ALN is usually sufficient.
4. Is ground current the limiting design constraint? → Evaluate Cu-Mo-Cu with your assembly partner.
5. Did SiC optimization still fail hotspot ΔT? → Scope diamond early access.
Related articles
Compare SiC and ALN for your GaN module
Send power level, die size, and package type — or order evaluation samples directly.
The part that depends on your die
The rules above hold for most edge-emitter modules. What changes from program to program is geometry, duty cycle, and how hard you are pushing junction temperature — those inputs decide material, thickness, and whether catalog samples are enough.
- Footprint, thickness, and solder pad art for your specific die.
- Reliability vs your duty cycle and cycling profile.
- A short internal-review memo your team can sign off before prototyping.
Go deeper — Pick material
These guides answer adjacent questions teams ask while choosing a submount. Each ends the same way: what you can decide in general, then what needs your die and power.
- ALN vs SiC Submounts: Thermal Conductivity, CTE, and Cost Comparison12 min · Use polycrystalline ALN (170–210 W/m·K) below ~100 W/cm² for InP/GaAs CTE match; choose single-cryst…
- DPC vs AMB vs DCB on Laser Submounts: Metallization Process Guide10 min · When to use direct plated copper (DPC), active metal brazing (AMB), or direct copper bonding (DCB) o…
- Single-Crystal SiC vs Polycrystalline ALN: A Microstructure Explanation5 min · Why single-crystal SiC reaches 350–400 W/m·K while polycrystalline ALN stops at 170–210 W/m·K — phon…
More topics coming — thermal path, attach yield, qualification, and packaging context.
